PURPOSE: To provide the clock switching control method without short break which receives two system frame clocks and changes over the clocks without short break without occurrence of a data error even when a phase difference is in existence between the clocks before and after the changeover of the clocks.
CONSTITUTION: The method is realized by using a 1st selection section 11, a phase comparator section 12, a phase delay section 13, and a 2nd selection section 14, the phase comparator section 12 compares a phase difference between inputted 0-system clock FP0 and 1-system clock FP1, the clock FP0(FP1) whose phase is delayed within a prescribed phase is outputted via the 1st selection section 11 and the 2nd selection section 14 and the clock FP1(FP0) whose phase is advanced within a prescribed phase is outputted from the phase comparator section 12 to the phase delay section 13, in which a required delay is received and the resulting clock is sent to the 2nd selection section 14 and the clock is used for a standby system clock.
Toyohiko Yoshino
Masumi Hozuki
