PURPOSE: To provide a DMA byte lane selection method for peripheral devices and a computer system where this method is built in.
CONSTITUTION: A direct memory access controller 102 executes a memory access cycle and an I/O access cycle to realize the 2-cycle method for execution of desired DMA transfer. In the memory access cycle, the address position of a system memory 106 to be accessed is driven onto an address designation line of a local bus 110. In the I/O access cycle, the address value in a DMA constitution address range is driven onto an address line of the local bus 110. In the I/O access cycle, lower two bits of the address value are encoded to give byte lane information to a peripheral device 108. The peripheral device 108 receives or gives data of a specific byte lane in response to them.
DAN ESU MAJIETSUTO
JIEIMUZU AARU MAKUDONARUDO
