To provide a ramp voltage generation circuit suitable for an A/D converter for suppressing variation caused in a digital value to be obtained by an A/D converting operation.

This ramp voltage generation circuit is provided with: a stabilization voltage source Vref; an operational amplifier AMP1 in which a voltage VREF to be output from the voltage source Vref is input to a non-inversion input terminal, and an inversion input terminal is connected to a switched capacitor equivalent resistor Req; and a transistor MNSF for performing the conduction control of currents Ick to the equivalent resistance Req on the basis of the output voltage of the operational amplifier AMP1, wherein both ends of a capacitive load Cint to be charged/discharged on the basis of currents Iint2 to be generated as the result of current-mirroring of the currents Ick are connected to the output terminal and inversion input terminal of the operational amplifier AMPint, and the voltage of the stabilization voltage source Vc is applied from the non-inversion input terminal, and the output voltage of the operational amplifier AMPint is output to the outside as a ramp voltage.