PURPOSE: To reduce greatly the number of occurrence of faults of a conversion index buffer (TLB), by dividing the TLB region into a voluntary region and a free region for register of the address pair and putting the pages having many using times into the voluntary region.

CONSTITUTION: When a TLB fault is detected by the TLB fault detecting circuit TF, a new pair of logic and real addresses is informed to the division control circuit DDC from the logic address set as the conversion subject by the dynamic address conversion mechanism DAT and in reference to the table. In case the registered address is the one in the space common region for OS, the contents of the voluntary regions mpWm1 of the TLB are shifted ESH successively toward the point l of division. Then the contents of the region m1 is erased, at the same time registering the new address pair in the region mp. While if the registered address is not in the space common region, the contents of the free regions npWn1 are shifted successively toward the point l. And the contents of the region n1 is erased, at the same time registering the new address pair into the region np.