To provide a data receiver and an adaptive equalizer circuit that can suppress a circuit size and reduce power consumption.
A plurality of receiving circuits 2a to 2d are connected to transmission lines and receive data signals from the transmission lines. The receiving circuits 2a to 2d include an equalizer for shaping a waveform of the received data signal. An adaptive equalizer circuit 3 is provided with every one for all or, two or more predetermined number of the plurality of receiving circuits 2a to 2d. The adaptive equalizer circuit 3 calculates equalization coefficients for shaping the waveform of the equalizers of the corresponding receiving circuits 2a to 2d and outputs the equalization coefficients to the corresponding receiving circuits 2a to 2d.
JPH01251811A | 1989-10-06 | |||
JPH10308784A | 1998-11-17 | |||
JPH1075237A | 1998-03-17 | |||
JPH09233007A | 1997-09-05 | |||
JPH01123535A | 1989-05-16 | |||
JPH0865222A | 1996-03-08 | |||
JP2003223761A | 2003-08-08 | |||
JP2005332453A | 2005-12-02 |
WO2005013505A1 | 2005-02-10 |
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