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Title:
DC VOLTAGE CONVERTING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP2004048893
Kind Code:
A
Abstract:

To reduce the capacitance of a capacitor connected to a DC power supply part by suppressing rush current and relieving burden of a DC power supply, in a DC voltage converting circuit for converting DC voltage supplied from the DC power supply.

This DC voltage converting circuit comprises a first group of transistors Q11 and Q12 connected in series between a first and a second terminals; a second group of transistors Q13 and Q14 connected in series between the second and a third terminals; a capacitor C11 connected between a prescribed connection point of the first group of transistors and a prescribed connection point of the second group of transistors; a capacitor C12 connected between the first and third terminals; switching devices Q21 and Q24 connected to the transistors Q11 and Q14 in parallel; and a control circuit 11 which keeps the transistors off within a prescribed period after DC voltage is supplied between the first and second terminals.


Inventors:
IKEDA MASUHIDE
Application Number:
JP2002000202226
Publication Date:
February 12, 2004
Filing Date:
July 11, 2002
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
H02M3/07; H03K17/16; H03K17/687; (IPC1-7): H02M3/07; H03K17/16; H03K17/687
Attorney, Agent or Firm:
柳瀬 睦肇
鈴木 直郁
宇都宮 正明
渡部 温