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Title:
DECOUPLING CAPACITOR AND SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP2005175003
Kind Code:
A
Abstract:

To provide a decoupling capacitor which can control a capacity value and a leakage current, and which has sufficient responsibility.

VSS 302 is given to the gate 304 of a MOS transistor constituting the decoupling capacitor. VDD 301 is given to a source 305 and a drain 306. NWVDD 303 of potential differs from the source 305 and the drain 306, and is given to a substrate 307. When NWVDD 303 is set to be higher than VDD 301, a depletion layer 309 is widen, and leakage current can be reduced instead of reducing capacity of the decoupling capacitor. When NWVDD 303 is set to be lower than VDD 301 to a degree that latch-up does no occur, the depletion layer 309 becomes small and capacity of the decoupling capacitor can be increased. The capacity value and the leakage current value of the decoupling capacitor are controllable by changing potential NWVDD 303 given to the substrate 307.


Inventors:
TSUTSUMI MASANORI
YANO JUNICHI
Application Number:
JP2003409173A
Publication Date:
June 30, 2005
Filing Date:
December 08, 2003
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G11C5/02; H01L21/765; H01L21/82; H01L21/822; H01L21/8234; H01L27/06; H01L27/04; H01L27/08; H01L27/088; H01L27/118; (IPC1-7): H01L21/82; H01L21/822; H01L21/8234; H01L27/04; H01L27/06; H01L27/118
Attorney, Agent or Firm:
Akio Miyai
Makoto Ito