Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
DELAY CIRCUIT
Document Type and Number:
Japanese Patent JP2013197781
Kind Code:
A
Abstract:

To set a delay time with high precision.

A delay circuit includes: a waveform circuit 10 for generating a waveform ramping with time; a sampling circuit 20 for sampling a plurality of voltage values VH, VL of the waveform at timings of a plurality of clocks SVH, SVL generated from an input signal CK, respectively; a voltage generation circuit 30 for generating a reference voltage Vth from the plurality of voltage values VH, VL; and a comparator 40 for comparing the voltage of the waveform with the reference voltage Vth and generating an output signal.


Inventors:
CHEUNG TSU-SHING
Application Number:
JP2012000061598
Publication Date:
September 30, 2013
Filing Date:
March 19, 2012
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
FUJITSU LTD
International Classes:
H03K5/14; H03K4/06
Attorney, Agent or Firm:
片山 修平