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Patent Searching and Data


Title:
DUPLEX ATM CELL DISASSEMBLING DEVICE
Document Type and Number:
Japanese Patent JPH06327074
Kind Code:
A
Abstract:

PURPOSE: To switch systems without the omission of frames by matching the states of two systems so as to let the frames outputted from both systems be equal at all times at the time of switching the systems at the time of duplex constitution.

CONSTITUTION: This system is constituted of the cell disassembling circuit 10a of a '0' system and the cell disassembling circuit 10b of a '1' system. 'Then, a frame monitoring part 7 compares a message byte number inside a memory 4 for work read by the frame output control part 5 of the present system ('0' system) and the frame read from a shared buffer memory 2 with the respective frames informed from the memory 4 for the work of the other system ('1' system) and the shared buffer memory 2 and performs transition from an asynchronized state to a synchronized state when everything coincides. Further, when the '0' system is a standby system and the synchronized state is smarted, the same frame reproduced inside the '0' system matched with the message byte number and the frame from the '1' system is abandoned and the states of the systems are matched so as to let the frames outputted from both systems be equal at all times.


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Inventors:
YAMAMOTO TORU
Application Number:
JP11257593A
Publication Date:
November 25, 1994
Filing Date:
May 14, 1993
Export Citation:
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Assignee:
NEC COMMUNICATION SYST
International Classes:
H04J3/00; H04L1/22; H04L12/28; H04Q11/04; (IPC1-7): H04Q11/04; H04J3/00; H04L1/22; H04L12/48
Attorney, Agent or Firm:
京本 直樹 (外2名)