Title:
FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
Japanese Patent JP3940552
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To solve the problem, where in order to maintain/improve performance while promoting micronization for a high integration of LSI, a gate insulating film of high dielectricity, with proper interface characteristics, is required.
SOLUTION: A field effect transistor, as well as its manufacturing method, are provided which comprises a gate insulating film 33 where a silicide film or a silicate film of 2-mono layers or fewer is provided on an Si substrate 31, over which an insulating film is laminated, and which comprises a gate insulating film where after an Si surface is terminated with a silicide film and a silicate film of 2-mono layers or fewer, an insulating film is laminated.
Inventors:
Yukie Sugawara
Nobuyuki Fukushima
Go Yamaguchi
Nobuyuki Fukushima
Go Yamaguchi
Application Number:
JP2000290649A
Publication Date:
July 04, 2007
Filing Date:
September 25, 2000
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L29/78; H01L21/203; H01L21/316; (IPC1-7): H01L29/78; H01L21/203; H01L21/316
Domestic Patent References:
| JP6140385A | ||||
| JP5121397A | ||||
| JP3242396A | ||||
| JP6140570A |
Other References:
R.A.McKee et al.,Crystalline Oxides on Silicon: The First Five Monolayers,Physical Review Letters,1998年10月 5日,Volume 81, Number 14,PP.3014-3017
Attorney, Agent or Firm:
Hiroshi Horiguchi