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Title:
FLAT PACK IC
Document Type and Number:
Japanese Patent JPS61208247
Kind Code:
A
Abstract:

PURPOSE: To conduct positioning positively by bending partial terminal leads at a right angle, projecting the terminal leads to sections lower than other terminal leads and fitting the partial terminal leads into positioning holes for a printed board.

CONSTITUTION: Terminal leads 1aW1d positioned at the four corners of a flat pack IC main body 3 in a plurality of terminal leads 2 are used as leads for positioning the main body 3 on a printed board 4. Positioning holes 5..., which are arranged in electrode pads 4a... row soldering the leads 2 and into which the leads 1aW1d are fitted, are formed to the printed board 4. Consequently, when the leads 1aW1d for the main body 3 are inserted into the holes 5 for the printed board 4, the main body 3 is mounted onto the printed board 4. Accordingly, positioning is conducted positively.


Inventors:
SASAKI YOSHIHIRO
MIZUNO ZEN
Application Number:
JP4889885A
Publication Date:
September 16, 1986
Filing Date:
March 12, 1985
Export Citation:
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Assignee:
NEC CORP
International Classes:
H05K1/18; H01L23/495; H01L23/50; H05K3/30; H05K3/34; (IPC1-7): H01L23/48; H05K1/18



 
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