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Title:
Formation of the self-consistency sauce for division gated mode fixity memory cells
Document Type and Number:
Japanese Patent JP6189535
Kind Code:
B2
Abstract:
A memory device having a pair of conductive floating gates with inner sidewalls facing each other, and disposed over and insulated from a substrate of first conductivity type. A pair of spaced apart conductive control gates each disposed over and insulated from one of the floating gates, and each including inner sidewalls facing each other. A pair of first spacers of insulation material extending along control gate inner sidewalls and over the floating gates. The floating gate inner sidewalls are aligned with side surfaces of the first spacers. A pair of second spacers of insulation material each extend along one of the first spacers and along one of the floating gate inner sidewalls. A trench formed into the substrate having sidewalls aligned with side surfaces of the second spacers. Silicon carbon disposed in the trench. Material implanted into the silicon carbon forming a first region having a second conductivity type.

Inventors:
スー チェン−シェン
ヤン ジェン−ウェイ
チェン ユエ−シン
Application Number:
JP2016524307A
Publication Date:
August 30, 2017
Filing Date:
July 01, 2014
Export Citation:
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Assignee:
SILICON STORAGE TECHNOLOGY, INC.
International Classes:
H01L27/11521; H01L21/336; H01L29/788; H01L29/792
Domestic Patent References:
JP11163329A
JP2009044164A
JP2010521817A
Attorney, Agent or Firm:
西島 孝喜
弟子丸 健
田中 伸一郎
大塚 文昭
須田 洋之
上杉 浩
近藤 直樹
岸 慶憲