Title:
FORMATION OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPH06177200
Kind Code:
A
Abstract:
PURPOSE: To improve bondability of the surface of a bonding pad and also reflectivity of the surface of a bonding pad.
CONSTITUTION: In a semiconductor integrated circuit device, a laminated wiring 10 and an oxide layer 10D between the aluminum alloy film 10B of a bonding pad and a cap metal film (TiW film, W film, TiN film) are formed, and after a bonding opening 11 is formed, the cap metal film 10C of the bonding pad and the oxide layer 10D respectively are removed in sequence.
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Inventors:
NISHIHARA SHINJI
SAWARA MASASHI
KOJIMA MASAYUKI
TANIGAKI YUKIO
HARUTA AKIRA
KAWABUCHI YASUSHI
SAWARA MASASHI
KOJIMA MASAYUKI
TANIGAKI YUKIO
HARUTA AKIRA
KAWABUCHI YASUSHI
Application Number:
JP32910492A
Publication Date:
June 24, 1994
Filing Date:
December 09, 1992
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H01L21/60; H01L21/3205; H01L23/52; (IPC1-7): H01L21/60; H01L21/3205
Attorney, Agent or Firm:
Akita Aki