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Title:
FREQUENCY-DIVIDING CIRCUIT
Document Type and Number:
Japanese Patent JP2006319446
Kind Code:
A
Abstract:

To provide a frequency-dividing circuit for stably generating a pulse signal for generating a sawtooth wave signal having a frequency of one third of the frequency of an input signal.

A T-flip-flop 21 inverts an output state in synchronization with the rising edge of a pulse signal B generated by an oscillator 10. A T-flip-flop 22 inverts an output state in synchronization with the rising edge of a logical signal C outputted from a Q_terminal of the T-flip-flop 21. An OR circuit 26 outputs the OR of the logical signal C and the logical signal D outputted from the Q_terminal of the T-flip-flop 22. A delay circuit 27 generates a delay signal E by delaying the rising edge of an output signal of the OR circuit 26. An AND circuit 28 resets the T-flip-flop 21 by utilizing the delay signal E. The pulse signal obtained by inverting the logic of the delay signal E is given to a sawtooth wave generation circuit 30.


Inventors:
OGAWA SHINGO
Application Number:
JP2005137556A
Publication Date:
November 24, 2006
Filing Date:
May 10, 2005
Export Citation:
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Assignee:
TOYOTA IND CORP
International Classes:
H03K23/64; H03K4/08
Attorney, Agent or Firm:
Yoshiyuki Osuga