PURPOSE: To simplify constitution by providing cascade-connected (n-1) line memories, offering an address in common to respective line memory, and writing read out image data on the line memory at the next stage as one-line delayed image data.

CONSTITUTION: The read out image data is written on the line memory at the next stage as the one-line delayed image data. Since the address for the line memories 45a-45g is used in common, data 0 is written on another line memories 45b-45g until the image data of one line is written on the line memory 45a at an initial stage. However, at the next line, the image data read out from the line memory 45a is outputted, and the image data is written on the line memory 45b at the next stage, and simultaneously, the image data of one line supplied to a terminal 2a is written on the line memory 45a. In such a way, the number of line memories can be reduced, and selectors to be provided at the input/output stages of the line memory can be omitted.