To provide a high precision trigger delay device capable of reducing jitter and improving the precision for a delay time of a trigger signal.

The high precision trigger delay device includes a first DA converter, a first phase modulator, a counter, a second DA converter, a second phase modulator, and a synchronizing circuit. The first DA converter receives input of a first digital signal, and outputs a DA converted first analog signal. The first phase modulator receives input of a first clock and the first analog signal, and outputs a first modulated clock in which the phase of the first clock is modulated. The counter receives input of the first modulated clock and a reset signal, and then starts counting based on the first modulated clock when the reset signal is input, and outputs a number when a set value is reached. The second DA converter receives input of a second digital signal, and outputs a DA converted second analog signal. The second phase modulator receives input of a second clock having the frequency of m times the first clock and the second analog signal, and outputs the second modulated clock in which the phase of the second clock is modulated.