Title:
HIGH-SPEED SAMPLE HOLDING AND COMPARING CIRCUIT
Document Type and Number:
Japanese Patent JPS5698795
Kind Code:
A
Abstract:
PURPOSE: To perform high-speed sample holding and comparing operation, by using a low-speed sample holding circuit and comparing circuit.
CONSTITUTION: An analog signal inputted from terminal 1 is supplied to the 1st sample holding circuit 2 and the 2nd sample holding circuit 4 is parallel. The 1st comparing circuit 3 compares the output of sample holding circuit 2 with some reference potential and generates a digital signal. The 2nd comparing circuit 5 compares the output of sample holding circuit 4 with some reference potential and then generates a digital signal. Those digital signals are selected alternately by information selecting circuit 6 and converted into a series signal, which is outputted to terminal 11.
Inventors:
YAMADA HIROSHI
AOKI KOUJI
WATANABE KENJI
AOKI KOUJI
WATANABE KENJI
Application Number:
JP17321079A
Publication Date:
August 08, 1981
Filing Date:
December 30, 1979
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G11C27/02; H03K9/02; (IPC1-7): G11C27/02; H03K9/02