Title:
インターフェースシステム
Document Type and Number:
Japanese Patent JP6640696
Kind Code:
B2
Abstract:
According to one embodiment, an interface system includes a receiver, a first clock generator, a second clock generator, and a sampling circuit. The receiver is configured to receive a first clock and serial data from a host. The first clock generator includes a first voltage controlled oscillator (VCO) and is configured to generate a second clock on the basis of the first clock. The second clock generator includes a second voltage controlled oscillator (VCO) and is configured to generate a third clock on the basis of the serial data. The sampling circuit is configured to sample reception data on the basis of the third clock and the serial data.
Inventors:
Toshitada Saito
Yohisa Fujimoto
Yohisa Fujimoto
Application Number:
JP2016206337A
Publication Date:
February 05, 2020
Filing Date:
October 20, 2016
Export Citation:
Assignee:
Kioxia Co., Ltd.
International Classes:
H04L7/033; G06F1/12; G06F1/3206; G06F1/3237; G06F13/38; H04L7/00
Domestic Patent References:
| JP7106961A |
Foreign References:
| WO2012021380A2 | ||||
| WO2016011341A1 |
Attorney, Agent or Firm:
Suzue International Patent Office