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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS6014466
Kind Code:
A
Abstract:

PURPOSE: To improve the accuray of an emitter photoetching process as well as to contribute in the stabilization of characteristics of the titled integrated circuit when it is used as a high frequency integrated circuit and the like by a method wherein an emitter diffusion window and a collector diffusion window are simultaneously formed on a thermal oxide film by performing an etching.

CONSTITUTION: After a thermal oxide film has been formed by performing a process in the same manner as before, a base diffusion window 22 and a collector contact window 23 are formed by performing a photoetching on the thermal oxide film 21. Then, resist is applied on the surface of a wafer, and a patterning is performed on the resist using a mask pattern 24. Subsequently, P type impurities are doped on a base region as shown by the arrow A using said resist as a mask, and a base diffusion layer 26 is formed. Then, the resist is removed completely, a heat treatment is performed in an oxidizing atmosphere, the desired junction depth of the base is obtained, and a thermal oxide film 25 is covered on the base diffusion window 22 and the collector contact window 23. Then, a window is provided on the thermal oxide film 25, and an emitter diffusion window 27 and a collector contact diffusion window 28 are formed. Subsequently, an already known process is performed, and the integrated circuit is completed.


Inventors:
AKAHA KOUJI
Application Number:
JP12095083A
Publication Date:
January 25, 1985
Filing Date:
July 05, 1983
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H01L29/73; H01L21/331; H01L29/72; H01L29/732; (IPC1-7): H01L29/72
Attorney, Agent or Firm:
Toshiaki Suzuki (1 person outside)