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Patent Searching and Data


Title:
MANUFACTURING METHOD OF MATRIX ARRAY SUBSTRATE
Document Type and Number:
Japanese Patent JP2002289857
Kind Code:
A
Abstract:

To provide a method for manufacturing an array substrate of a liquid- crystal display device of improved reliability, without decreasing an open area ratio, while reducing the manufacturing cost.

A scanning line 14 is formed on a substrate 10, on which a first insulation film 32, a second insulation film 34, a semiconductor film 36 and a metal film are deposited. The metal thin film, semiconductor film, and second insulating film are patterned, based on the same pattern until the first insulating film is exposed, to form a signal wire, a source electrode, and a drain electrode. A third insulation film covering the scanning line, source electrode, drain electrode, and signal wire is deposited so that a contact hole is formed on the third insulation film over the source electrode. Further, a pixel electrode 28 is formed which is connected electrically to the source electrode via the contact hole.


Inventors:
HIRAHARA HARUAKI
OKAJIMA KENJI
Application Number:
JP2001084985A
Publication Date:
October 04, 2002
Filing Date:
March 23, 2001
Export Citation:
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Assignee:
TOSHIBA CORP
IBM
International Classes:
G02F1/1368; G09F9/30; H01L21/28; H01L21/302; H01L21/3065; H01L21/3213; H01L21/336; H01L21/768; H01L29/786; (IPC1-7): H01L29/786; G02F1/1368; G09F9/30; H01L21/28; H01L21/3065; H01L21/3213; H01L21/336; H01L21/768
Attorney, Agent or Firm:
Takehiko Suzue (5 outside)