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Title:
METHOD AND DEVICE FOR SUBSTRATE FLATTENING, AND MANUFACTURE OF SEMICONDUCTOR DEVICE THEREBY
Document Type and Number:
Japanese Patent JP2000340538
Kind Code:
A
Abstract:

To provide a flattening cievice which is capable of accurately and reproducibly detecting the polishing volume of a polished layer on a substrate, without interrupting a polishing operation, accurately determining an end point of polishing, and flattening the substrate.

A support (wafer holder) 14, which holds a substrate (semiconductor wafer) 1 as a work to polish, includes a rubber pod 16 which presses the surface of the wafer 1 against a polishing body 17 coming into contact with the rear of the wafer 1, and temperature detecting devices 20, which detect temperatures are provided inside or on the surface of the rubber pod 16 at a prescribed interval so as to be on the same plane. Temperatures or a temperature distribution throughout the surface of the wafer 1 is obtained, based on signals emitted from the detecting devices 20 which detect temperatures in real time, and temperatures or a temperature distribution is calculated in term of a polishing volume.


Inventors:
SUGAYA MASAKAZU
MATSUSHIMA MASARU
KAWAMURA YOSHIO
KATAGIRI SOUICHI
Application Number:
JP1999000151432
Publication Date:
December 08, 2000
Filing Date:
May 31, 1999
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
B24B37/013; H01L21/304; (IPC1-7): H01L21/304; B24B37/04
Attorney, Agent or Firm:
高橋 明夫 (外1名)