To enhance a communication speed even when processing to a command takes much time.
First and second microcomputers 10, 20 are in a relation of master and slave, and each has a CPU, a ROM, a RAM and also a configuration of a communication control section and a serial communication block or the like that are known. The 1st microcomputer 10 continuously transmits a serial communication clock SCLK to the 2nd microcomputer 20 at a prescribed frequency. Serial communication blocks 17, 29 of each microcomputer have a couple of shift registers that are switched. Then a communication control sections 16, 28 read a signal SRXD sent from an opposite microcomputer for a prescribed clock number and conduct processing according to a processing command in the read signal SRXD for a succeeding prescribed number of clocks and transmits the processing result STXD corresponding to the processing command to the opposite microcomputer for a further succeeding prescribed number of clocks.
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