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Title:
METHOD FOR ESTIMATING SEMICONDUCTOR JUNCTION CAPACITANCE
Document Type and Number:
Japanese Patent JP2001358044
Kind Code:
A
Abstract:

To estimate the junction capacitance accurately and in a high speed by devices having ununiform well structures.

Junction capacitance relating to a plurality of diffusion layers having different lengths are found out by a simulator. The results are divided into ones whose length of diffusion layer is long and ones whose length thereof is short, and first and second linear expressions which are respectively approximate and use the length of diffusion layer as a variable are obtained. Junction capacitance per unit area in the central part of the diffusion layer is obtained from the gradient of a straight line expressed by the first linear expression, and that per unit area in the peripheral part of the diffusion layer from the gradient of a straight line expressed by the second linear expression, respectively. Junction capacitance per unit length in a side surface 16 is obtained as half the value expressed by the second linear expression in the case when the length of diffusion layer is zero. Then, the junction capacitance of every part are obtained from the obtained junction capacitance and the areas and lengths of the parts, and the total junction capacitance is found out by finally summing up the results.


Inventors:
KAWANO MASAYA
Application Number:
JP2000181773A
Publication Date:
December 26, 2001
Filing Date:
June 16, 2000
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L29/00; H01L21/00; H01L27/08; (IPC1-7): H01L21/00; H01L29/00
Attorney, Agent or Firm:
Shigeru Noda