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Title:
METHOD FOR MANUFACTURING SUBSTRATE IN WHICH CAVITY IS FORMED
Document Type and Number:
Japanese Patent JP2007221110
Kind Code:
A
Abstract:

To provide a method for manufacturing a substrate in which a cavity is formed.

The method for manufacturing the substrate in which a cavity is formed, comprises (a) a step of forming an upper layer circuit on an upper seed layer, (b) a step of laminating a dry film in a region, where a cavity is formed, of the upper seed layer, (c) a step of forming an insulating layer 330 on a top surface of the upper seed layer and a top surface and a side surface of the upper layer circuit to form an upper outer layer, (d) a step of laminating the upper outer layer on one surface of a core layer 310 on which an inner layer circuit 320 is formed, (e) a step of removing the upper seed layer, and (f) a step of removing the dry film to form the cavity. In the method for manufacturing the substrate in which the cavity is formed, by forming the insulating layer on the side surface of an outer layer circuit 340, total height of the substrate can be reduced while keeping the same height of the insulating layer.

COPYRIGHT: (C)2007,JPO&INPIT


Inventors:
JUNG HOE KU
KANG MYUNG SAM
KIM JI-EUN
PARK JUNG-HYUN
Application Number:
JP2007007727A
Publication Date:
August 30, 2007
Filing Date:
January 17, 2007
Export Citation:
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Assignee:
SAMSUNG ELECTRO MECH
International Classes:
H01L23/12; H01L25/065; H01L25/07; H01L25/18; H05K3/46
Domestic Patent References:
JPH0936549A1997-02-07
JP2003243837A2003-08-29
JPH01282892A1989-11-14
Attorney, Agent or Firm:
龍華 明裕