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Title:
METHOD FOR MEASURING LIFE TIME OF MINORITY CARRIERS AND MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3661334
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide a method by which the life time of minority carriers which are excited only in an SOI(silicon-on-insulator) layer in a semiconductor device, having the SOI layer formed by laminating a single-crystal silicon layer upon an insulating film can be measured.
SOLUTION: In a method for measuring life time of minority carriers, a p+-type layer 4 and an n+-type layer 5 are formed in a p+-type SOI layer 3 and metal wiring 6a, which connects the layers 4 and 5 to a p+-type layer pad electrode and an n+-type layer pad electrode, is provided. Then a charge- measuring instrument 8 is provided between the n+-type layer pad electrode and the ground, and the p+-type layer pad electrode is connected to the ground. In addition, the quantity of charges collected to the n+-type layer pad electrode is measured by means of the charge-measuring instrument 8, when ions are implanted into the SOI layer 3 between the layers 4 and 5 and the life time of the minority carrier of the SOI layer 3 is calculated, based on the relation between the implanting position of the ions and the quantity of the charges collected.


Inventors:
佐藤 成生
戸坂 義春
金田 博幸
Application Number:
JP1997000030156
Publication Date:
June 15, 2005
Filing Date:
February 14, 1997
Export Citation:
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Assignee:
富士通株式会社
International Classes:
G01N22/00; H01L21/66; H01L27/12; (IPC1-7): H01L21/66; G01N22/00; H01L27/12
Domestic Patent References:
JP6338550A
JP6338549A
JP6085023A
Attorney, Agent or Firm:
横山 淳一



 
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