To unnecessitate preparing erasing and writing procedures of a flash EEPROM in a RAM and the like by enabling switching an instruction fetch place by access from a CPU not only in an external terminal state at the time of reset but also in a state after terminal setting.
When a user program mode is set during execution of a user program, a flash EEPROM M15 down-loads temporarily contents and the like of an address, data, general purpose register to one part region of a RAM 13, execution of a program is transferred from the flash EEPROM to a ROM 12. Thus, a CPU 11 conforms to erasing and writing procedures prescribed by an EEPROM writing control program stored in the ROM 12 hereafter by switching an instruction fetch place, while performs erasing and writing of the flash EEPROM 15 referring to an address and data also evacuated to the RAM 13.
OKUDA IKUTARO
KUBOTA KEI
