To reduce stack buffers conventionally required for the case that section leading (n) bytes inside one TS packet are not included for all the (n) bytes, are disconnected in the middle and are put over the TS packets provided with the same PID.

In this data separation circuit, a PID filter part 1 extracts only the TS packet of a desired PID and writes an input section to an RAM first and a comparator 5 compares the section leading (n) bytes with the pertinent data of a reference data register 6. When they do not match, a line address is returned to the leading address of section data and elimination is performed by the next write. When the leading (n) bytes are incomplete, a disconnection byte position and only a matching/non-matching status are held and comparison is performed together with the succeeding leading (n) bytes. The RAM write of succeeding data is performed at the time of matching and the non-matching processing is performed at the time of non-matching.