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Title:
発振回路
Document Type and Number:
Japanese Patent JP4989106
Kind Code:
B2
Abstract:
The invention provides an oscillator circuit that reduces the dependence of an oscillation frequency on a power supply voltage. A charging and discharging circuit is a circuit switchable between an initializing operation setting an initial voltage for discharge and a discharging operation, and outputs a clock when the discharge is completed. The clock is inputted to a set terminal of a RS flip-flop. A signal formed by delaying an output signal of the RS flip-flop by a delay circuit is inputted to a reset terminal of the RS flip-flop. The output signal of the RS flip-flop is inverted to a discharge enable signal by an inverter, and the discharge enable signal is inputted to a switching circuit of the charging and discharging circuit. With this structure, the charging and discharging circuit alternately repeats the initializing operation and the discharging operation, and by the initialization the discharging operation is always started from the power supply voltage.

Inventors:
Yoshinobu Nishiyama
Application Number:
JP2006137379A
Publication Date:
August 01, 2012
Filing Date:
May 17, 2006
Export Citation:
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Assignee:
ON Semiconductor Trading Limited
International Classes:
H03K4/08
Domestic Patent References:
JP7038388A
Attorney, Agent or Firm:
Katsuhiko Sudo



 
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