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Title:
発振回路
Document Type and Number:
Japanese Patent JP5193590
Kind Code:
B2
Abstract:

To provide an oscillation circuit capable of achieving the reduction of a circuit scale and the reduction of current consumption.

The oscillation circuit includes: amplifiers (11 to 15) for generating a charging/discharging current of a capacitor 16 in accordance with levels of first and second input signals; comparators 21, 22 for respectively comparing a terminal voltage Va of the capacitor 16 with an upper limit voltage Vth1 and a lower limit voltage Vth2; a flip-flop 30 to be reset/set by respective output signals from the comparators 21, 22; and switches 24, 25 for supplying a drive current to either one of the comparators 21, 22 in accordance with a control signal. The amplifiers input an output voltage Vb of the flip-flop 30 as a first input signal and input a terminal voltage Va of the capacitor 16 as a second input signal. The switches 24, 25 use the output voltage Vb of the flip-flop 30 as a control signal.

COPYRIGHT: (C)2009,JPO&INPIT


Inventors:
Hideo Hara
Application Number:
JP2007335563A
Publication Date:
May 08, 2013
Filing Date:
December 27, 2007
Export Citation:
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Assignee:
ROHM Co., Ltd.
International Classes:
H03K3/0231; H03K4/06
Domestic Patent References:
JP5671326A
JP61224514A
JP11103239A
JP2002217687A
JP2004349831A
Attorney, Agent or Firm:
Shizuo Sano
Hideki Hayashida



 
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