To provide an oscillation circuit capable of providing signals of stable cycles even if noise is generated.
In the oscillation circuit of the Fig. 1, a high-level signal is inputted to a S terminal of a RS flip-flop circuit 108 when a voltage V1 of a first capacitor 102 is higher than a reference voltage Vst. A low-level signal is inputted to a R terminal of the RS flip-flop circuit 108 when a voltage V2 of a second capacitor 103 is higher than the reference voltage Vst. By the control of a first charge/discharge control circuit 109, the first capacitor 102 is in a discharging state when an output signal Q is at a high level, while it is in a charging state when the output signal Q is at a low level. By the control of a second charge/discharge control circuit 110, the second capacitor 103 is in a discharging state when an inversion output signal QB is at a high level, while it is in a charging state when the inversion output signal QB is at a low level.
COPYRIGHT: (C)2007,JPO&INPIT
YAMANE ICHIRO
HAMAGUCHI TOSHIFUMI
KIDA KAZUHISA
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura