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Patent Searching and Data


Title:
OSCILLATION CIRCUIT
Document Type and Number:
Japanese Patent JP2008022076
Kind Code:
A
Abstract:

To provide an oscillation circuit capable of fully swinging with low power consumption by using a comparatively simple circuit configuration.

The oscillation circuit 10 comprises an oscillation core block 100, a voltage limit bock 120, and a differential output block 140. Drain terminals of transistors (M1, M2) are respectively connected to the voltage limit bock 120, which supplies an oscillation signal. The voltage limit bock 120 limits the amplitude of the oscillation signal to a reference voltage Vref. Source terminals of transistors (M9, M11) are connected to drain terminals of transistors (M5, M7), and source terminals of transistors (M10, M12) are connected to drain terminals of transistors (M6, M8). Thus, a current caused by amplitude limit is supplied to the differential output block 140 and the differential output block 140 converts this current into a drive voltage VCC to a ground voltage GND to execute full swing.


Inventors:
KIMURA HIROYUKI
Application Number:
JP2006189731A
Publication Date:
January 31, 2008
Filing Date:
July 10, 2006
Export Citation:
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Assignee:
FREESCALE SEMICONDUCTOR INC
International Classes:
H03K4/50; H03K3/353
Domestic Patent References:
JPS53138262A1978-12-02
JPH10146971A1998-06-02
Attorney, Agent or Firm:
Mamoru Kuwagaki