Title:
POWER SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2019079935
Kind Code:
A
Abstract:
To achieve a compact and high-output power semiconductor device by inhibiting position gap of an inner lead when the inner lead is joined to a lead frame.SOLUTION: A power semiconductor device 1 comprises: an inner lead 6 having a notch 7 along a longer direction end face 6a on a region 23 of a lead frame 2 where the inner lead 6 is joined; and an electronic component (resistor 4) arranged adjacent to the inner lead 6 and on the same side with the notch 7. By setting a distance L1 between the inner lead 6 and the notch 7 smaller than a distance L2 between the inner lead 6 and the resistor 4, the inner lead 6 does not touch the resistor 4 even when a position gap is created. Because of this, it is not required to create a space around the inner lead 6 in view of the position gap of the inner lead 6 thereby to enable a radiation area for a power semiconductor chip 3 to be ensured and a compact and high-output power semiconductor device 1 to be achieved.SELECTED DRAWING: Figure 4
Inventors:
TANAKA SABURO
FUKASE TATSUYA
KATO MASAKI
EMI TETSUO
FUKASE TATSUYA
KATO MASAKI
EMI TETSUO
Application Number:
JP2017205800A
Publication Date:
May 23, 2019
Filing Date:
October 25, 2017
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L23/48; H01L21/60; H01L23/50; H01L25/07; H01L25/18
Domestic Patent References:
| JP2014078646A | 2014-05-01 | |||
| JP2016143693A | 2016-08-08 | |||
| JP2002198484A | 2002-07-12 | |||
| JPS6367260U | 1988-05-06 |
Foreign References:
| US20070166877A1 | 2007-07-19 |
Attorney, Agent or Firm:
Masuo Oiwa
Takenaka Ikuo
Keigo Murakami
Kenji Yoshizawa
Takenaka Ikuo
Keigo Murakami
Kenji Yoshizawa