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Title:
PROCESSING SYSTEM FOR ABSORBING FLUCTUATION OF TRANSFER IN PACKET COMMUNICATION
Document Type and Number:
Japanese Patent JPS6342538
Kind Code:
A
Abstract:

PURPOSE: To eliminate the need for adding function for absorbing fluctuation by temporarily setting the clock of a reception terminal again on a basis of the clock of a transmission terminal at the time of communication start to delay the output start of packet information until time information in a header coincides the time measured by the clock of the reception terminal itself.

CONSTITUTION: A call controller 29 in the reception terminal starts a packet decomposition control circuit 44 and a decoder 28 in a packet decomposer 27 by the completion of call setting. If a taken-out packet is the first packet, the packet decomposition control circuit 44 sets the value, which is obtained by subtracting R from a time T in the packet header, to a time (t) of a reception clock 47 and starts the clock. Thereafter, the packet decomposition control circuit 44 waits until the time (t) of the reception clock 47 coincides with the header set time T in accordance with elapse of time. Thus, it is unnecessary to add special functions to repeating nodes in a network.


Inventors:
OKADA TADANOBU
ONISHI KOICHI
Application Number:
JP18629686A
Publication Date:
February 23, 1988
Filing Date:
August 08, 1986
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H04M3/00; H04L12/70; (IPC1-7): H04L11/20; H04M3/00
Domestic Patent References:
JPS61129952A1986-06-17
JPS5840399A1983-03-09
JPS55132159A1980-10-14
JPS57159192A1982-10-01
JPS58134557A1983-08-10
Attorney, Agent or Firm:
Masatoshi Isomura