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Patent Searching and Data


Title:
RATE CONVERTER
Document Type and Number:
Japanese Patent JP3544998
Kind Code:
B2
Abstract:

PURPOSE: To provide the rate converter not requiring a digital filter operated by a clock rate being a least common multiple between an input clock rate and an output clock rate and employing a digital filter to implement rate conversion.
CONSTITUTION: A delay output of input data from a shift register 1 operated by an input clock rate is latched by latch circuits 2A-2D at an output clock rate and its latch output and a filter coefficient generated from coefficient generators 3A-3D sequentially at the output clock rate are multiplied respectively by multipliers 4A-4D and the product outputs are summed by an adder 5 to apply filtering processing to the input data by the output clock rate.


Inventors:
Takahiro Ikeyama
Takashi Asai
Application Number:
JP18577492A
Publication Date:
July 21, 2004
Filing Date:
June 22, 1992
Export Citation:
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Assignee:
ソニー株式会社
International Classes:
H03H17/06; H04N7/01; H04N9/00; H04N5/46; H04N11/20; (IPC1-7): H04N9/00; H04N5/46; H04N11/20
Domestic Patent References:
JP6447113A
Attorney, Agent or Firm:
Akira Koike
Eiichi Tamura
Seiji Iga