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Title:
RECEIVER FOR SELECTIVE INTER-CALL
Document Type and Number:
Japanese Patent JPS57145448
Kind Code:
A
Abstract:

PURPOSE: To improve the battery saving ratio, by reducing the duration of the electrode pulse which is periodically supplied and detecting the preamble signal while securing the synchronism for each bit.

CONSTITUTION: The power supply is applied to a receiving part 2 for a prescribed time x1' after closing a power supply switch 5. Thus the part 2 demodulates the receibed signal and transmits it to a control part 8. The part 8 has a monitor to discriminate the preamble signal based on the demodulated signal. If no preamble signal is detected within the time x1', the part 8 controls the switch 5 to cut the application of power supply to the part 2 for a fixed time (y') by a battery saving operation. When the preamble signal is detected for the next time x2', the power supply is secured for a certain time (α+β). Then the acquisition of synchronism is carried out for the first time α to secure the synchronism between the demodulated signal given from the part 2 and the internal clock. In the next time β, the confirmation is given whether the received signal is a preamble signal or not.


Inventors:
OOYAGI KOUJI
Application Number:
JP3056681A
Publication Date:
September 08, 1982
Filing Date:
March 05, 1981
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H04W52/02; H04B1/16; H04W84/02; H04W88/02; (IPC1-7): H04B7/26



 
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