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Title:
SCANNING LINE CONVERTING PROCESSING CIRCUIT
Document Type and Number:
Japanese Patent JP2000308020
Kind Code:
A
Abstract:

To curtail the circuit configuration required for successive scanning line conversion by means of an FD system (a system for successively performing scanning line conversion by separating low-frequency components and high-frequency components in a temporal direction from each other by using frame coupling).

When a scanning line converting circuit makes vertical scaling by means of the ED system, the circuit separates low-frequency components and high-frequency components in the temporal direction from each other by means of a V-LPF 14 and a V-HPF 15 and generates the filter characteristics for separation of the filters 14 and 15 by using interpolation coefficients folding in characteristics for vertical compression/expansion. Therefore, the scaling of the low- and high-frequency components can be realized simultaneously by only rearranging the components after synthesization.


Inventors:
SATO KOICHI
SUZUKI TAKASHI
YOSHIDA RIICHIRO
Application Number:
JP10938299A
Publication Date:
November 02, 2000
Filing Date:
April 16, 1999
Export Citation:
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Assignee:
TOSHIBA CORP
TOSHIBA DIGITAL MEDIA ENG
International Classes:
H04N5/44; H04N5/45; H04N7/01; (IPC1-7): H04N7/01; H04N5/44; H04N5/45
Attorney, Agent or Firm:
Suyama Saichi