Title:
SEMICODUCTOR MEMORY CIRCUIT
Document Type and Number:
Japanese Patent JPH08235854
Kind Code:
A
Abstract:
PURPOSE: To obtain a semiconductor memory circuit which is divided in a programmable manner by arranging switches having storage elements on bit and word lines.
CONSTITUTION: Switches 216 to 239 having storage elements are arranged for respective every plural bits of word lines 240 to 255 and bit lines 256 to 271 of the semiconductor memory circuit. Each switch is connected by switch signal lines 272 to 275. Word or bit lines are logically disconnected when the storage element of the switch is set to 0 and are logically connected when 1 is set. Thus, the semiconductor memory circuit is divided in a programmable manner by the switches.
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Inventors:
KAWAGUCHI KENICHI
MOTOHARA AKIRA
MOTOHARA AKIRA
Application Number:
JP3682995A
Publication Date:
September 13, 1996
Filing Date:
February 24, 1995
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G11C11/41; G11C11/401; (IPC1-7): G11C11/401; G11C11/41
Attorney, Agent or Firm:
Tomoyuki Takimoto (1 person outside)
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