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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPS59208782
Kind Code:
A
Abstract:

PURPOSE: To enable to simultaneously form a plurality of transistors which perform various kinds of functions by a method wherein, in the case of a circuit block containing three or more of transistor, the gates in the block are arranged in parallel.

CONSTITUTION: A semiconductor integrated circuit device is generally divided into part A and part B, and the part A consists, for example, of a memory and the part B consists of a processor circuit located on the circumference. Different characteristics are required for the transistors used for the circuits of said part A and part B, and these transistors are formed in different sizes and also the pitches of the gates G are deviated. In this case, when all gates G are positioned in parallel, they are formed in the width T, and they are arranged in such a manner that the position occupied by the gates is included in the white and black pattern indicated by 2T, all gate patterns can be obtained by performing only one exposing process.


Inventors:
NOMURA NOBORU
KUGIMIYA KOUICHI
Application Number:
JP8302383A
Publication Date:
November 27, 1984
Filing Date:
May 12, 1983
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L21/822; G03F7/20; G03H1/04; H01L21/027; H01L21/339; H01L27/04; H01L29/762; H01L29/78; (IPC1-7): H01L21/30; H01L21/88; H01L27/04
Attorney, Agent or Firm:
Toshio Nakao