To provide a semiconductor device that is capable of executing a high-speed operation, and has a low standby current.
A response to a fluctuation of a negative voltage VNEG becomes fast in a semiconductor integrated circuit device, since a negative-voltage generation circuit 2 is provided to each of power-supply circuits P1-P6 for memory macros M1-M6. It is possible to prevent an increase in standby current, since only the negative-voltage generation circuit 2 of one power-supply circuit P1 in the negative-voltage generation circuits 2 of the six power-supply circuits P1-P6 is activated by connecting negative-voltage supply lines L1-L6 for memory macros M1-M6 with each other by switch circuits SW2-SW6 during a standby mode.
COPYRIGHT: (C)2007,JPO&INPIT
IGAUE FUTOSHI
YOSHINAGA KENJI
MATSUMURA MASASHI
MORISHITA GEN
| JP2006040533A | 2006-02-09 | |||
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| WO2005001938A1 | 2005-01-06 |
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
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