Semiconductor device

Japanese Patent JP6251071

B2

A semiconductor device is configured to provide a trench (T) that penetrates a barrier layer (BA), and reaches a middle portion of a channel layer (CH) among an n+ layer (NL), an n-type layer (Dn), a p-type layer (Dp), the channel layer, and the barrier layer which are formed above a substrate (S), a gate electrode (GE) arranged within the groove through a gate insulating film (GI), and a source electrode (SE) and a drain electrode (DE) which are formed above the barrier layer on both sides of the gate electrode. The n-type layer and the drain electrode are electrically coupled to each other by a connection portion that reaches the n+ layer. The p-type layer and the source electrode are electrically coupled to each other by a connection portion that reaches the p-type layer. A diode including a p-type layer and an n-type layer is provided between the source electrode and the drain electrode, to thereby prevent the breaking of an element caused by an avalanche breakdown.

Nakayama Tatsumine
Hironobu Miyamoto
Yasuhiro Okamoto
Yoshinao Miura
Takashi Inoue

JP2014019950A

December 20, 2017

February 05, 2014

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Renesas Electronics Corporation

H01L21/337; H01L21/336; H01L21/338; H01L21/822; H01L27/04; H01L27/06; H01L29/778; H01L29/78; H01L29/808; H01L29/812

JP2009164158A
JP2013201392A
JP2013125913A
JP2006196869A
JP2013235873A
JP2013157407A
JP2010267958A
JP2013042120A
JP2010135641A
JP2013211423A

Yamato Tsutsui
Atsushi Sugada
Akiko Tsutsui
Tetsuya Sakaji

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