Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JP2002191169
Kind Code:
A
Abstract:
To prevent the breakage of a gate oxide film of a transistor at a double boost part.
A capacitor C12 is connected between a node L at the double boost part and a ground voltage, and the amplitude of a repeat pulse of the node L is made less than two times of a power source voltage, making user of the charge and discharge of the capacitor C12. Moreover, in a charge pump circuit of a double boost type, a plurality of capacitors is connected to between the ground voltages via a plurality of fuses which conducts a laser trimming between the node L and the second capacitor C2, to enable the regulation of the supply capacity of an internal voltage VBB by connecting/disconnecting each fuse.
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Inventors:
FUJII NOBUYUKI
MORISHITA GEN
YAMAZAKI AKIRA
TATEWAKI YASUHIKO
OKAMOTO MASAKO
MORISHITA GEN
YAMAZAKI AKIRA
TATEWAKI YASUHIKO
OKAMOTO MASAKO
Application Number:
JP2000387687A
Publication Date:
July 05, 2002
Filing Date:
December 20, 2000
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L27/04; G11C5/14; H01L21/822; H02M3/07; H03K19/094; G05F1/46; (IPC1-7): H02M3/07; H01L27/04; H01L21/822; H03K19/094
Attorney, Agent or Firm:
Hiroaki Tazawa (1 person outside)