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Patent Searching and Data


Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS6390910
Kind Code:
A
Abstract:

PURPOSE: To constitute arbitrary filters (LPF, HPF, BPF, BEF) by setting a frequency division ratio of a programmable frequency devider from the outside.

CONSTITUTION: registers 121∼124 are provided in order to give arbitrary frequency division ratios of program frequency dividers 111∼114, and latched through a data bus buffer 131 from a data bus of a microcomputer system. In this example, they are set as registers of 11 bits, but its bit length is in a relation between (fc) and an external clock frequency selection, and it is unnecessary to stick to 11 bits. In case of 11 bits, the programmable frequency division ratio can be set at every other unit extending from '0' to 2047. The data bus is usually of 8 bits, therefore, it necessary to input a data two times. Whether write of a data to the register is the lower 8 bits or the upper 3 bits is controlled by A2 being an MSB of an address bus.


Inventors:
GOMI TSUGUO
Application Number:
JP23747486A
Publication Date:
April 21, 1988
Filing Date:
October 06, 1986
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
H03H19/00; (IPC1-7): H03H19/00
Attorney, Agent or Firm:
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