Title:
SEMICONDUCTOR MEMORY, METHOD OF MANUFACTURING THE SAME, AND METHOD OF OPERATING THE SAME
Document Type and Number:
Japanese Patent JP2006135043
Kind Code:
A
Abstract:
To provide a semiconductor memory that can be manufactured easily and can be easily put to miniaturization.
In the semiconductor memory, source and drain regions 104 and 105 partially overlap floating gates 110 and 111, and the side faces of the floating gates 110 and 111 are formed roughly along contact plugs 113 and 114. Since the contact plugs 113 and 114 exist near the floating gates 110 and 111, the writing speed and the erasing speed of a memory device can be increased without increasing the area of the device.
Inventors:
KATAOKA KOTARO
Application Number:
JP2004321634A
Publication Date:
May 25, 2006
Filing Date:
November 05, 2004
Export Citation:
Assignee:
SHARP KK
International Classes:
H01L21/8247; G11C16/02; G11C16/04; H01L27/115; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Hiroshi Yamazaki
Atsushi Maeda
Yukinori Nakakura
Atsushi Maeda
Yukinori Nakakura
Previous Patent: 垂直焼成炉及びそれを使用した焼成方法
Next Patent: SUBSTRATE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DEVICE USING THE SAME
Next Patent: SUBSTRATE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DEVICE USING THE SAME