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Title:
SIGNAL PROCESSOR USING MULTIPROCESSOR
Document Type and Number:
Japanese Patent JPH0528121
Kind Code:
A
Abstract:

PURPOSE: To attain the communication and the arithmetic operations at a high input rate by limiting the data transmitting direction and securing the connection between the noted processors via plural processors.

CONSTITUTION: The processors adjacent to each processor that outputs the data are used exclusively for communication of data, and a single data transmitting direction is defined. Then the processors are actuated so that all data pass through the end of the output side of a 1st serial connection of the processor groups 801-812. Meanwhile the data on the corresponding processors can be received and at the same time the processors adjacent to each processor that receives the data are used exclusively for communication of data. These processors are connected in series and actuated so that the data on the output side are received at one of both ends of the output side and all data pass through the other end. Furthermore the passing data can be received and allocated to the corresponding processors. Thus the waste time is reduced and the data are transferred in order.


Inventors:
SHIMAZAKI HISAO
HOSHINO KIYOSHI
Application Number:
JP1991000184871
Publication Date:
February 05, 1993
Filing Date:
July 24, 1991
Export Citation:
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Assignee:
TOSHIBA CORP
TOSHIBA AVE KK
International Classes:
G06F15/16; G06F15/173; G06F15/18; G06F15/80; G06N3/04; G06N99/00; (IPC1-7): G06F15/16; G06F15/18
Attorney, Agent or Firm:
鈴江 武彦