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Title:
SYSTEM AND METHOD FOR INSPECTING WAFERS
Document Type and Number:
Japanese Patent JP2019049556
Kind Code:
A
Abstract:
To provide an inspection system for inspecting semiconductor wafers.SOLUTION: An inspection system includes an illumination setup 28, 30 for providing broadband illumination. The broadband illumination can be of different contrasts, such as brightfield and darkfield broadband illumination. The inspection system further includes a first image capture device 32 and a second image capture device 34, each being configured to receive broadband illumination so as to capture images of a semiconductor wafer while the semiconductor wafer is in motion. The system has a number of tube lenses for enabling collimation of the broadband illumination. The system also has a stabilizing mechanism and an objective lens assembly 40.SELECTED DRAWING: Figure 8

Inventors:
AJHARALI AMANULLAH
LIN JING
GE HAN CHENG
WONG KOK WENG
Application Number:
JP2018179667A
Publication Date:
March 28, 2019
Filing Date:
September 26, 2018
Export Citation:
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Assignee:
SEMICONDUCTOR TECH & INSTRUMENTS PTE LTD
International Classes:
G01N21/956
Domestic Patent References:
JP2006525523A2006-11-09
JPS58204344A1983-11-29
JP2005214978A2005-08-11
JP2001183301A2001-07-06
JP2007149837A2007-06-14
JPH02170279A1990-07-02
Foreign References:
US20070273945A12007-11-29
US5822055A1998-10-13
US6829559B22004-12-07
US20050094136A12005-05-05
Attorney, Agent or Firm:
Moriya Kazuo