To provide determination information for determining optimization of a design description.
A character inputting means 11 inputs a design description of a behavior level which describes a behavior of a semiconductor integrated circuit. The character inputting means 11 inputs a constraint condition on the design description. The design description and the constraint condition output from the character inputting means 11 are input to an behavior synthesizing part 14 through a design environment tool 13 to be subjected to behavioral synthesis about the design description, and the behavior synthesizing part 14 outputs determination information for optimization determination of the design description. The output determination information is displayed on a screen of an output part 18.
NAKAMURA NORITSUGU
KUDO KENICHI
NEC ENGINEERING LTD
JP2009211614A | 2009-09-17 | |||
JP2008077490A | 2008-04-03 | |||
JP2002222228A | 2002-08-09 | |||
JP2003067438A | 2003-03-07 | |||
JP2002222228A | 2002-08-09 | |||
JP2007233521A | 2007-09-13 | |||
JP2009211614A | 2009-09-17 | |||
JP2008077490A | 2008-04-03 |
CSNH200900082003; 古田 浩一朗, 粟島 亨, 藤井 太郎, 戸川 勝巳, 戸井 崇雄, 本村 真人: '電子デバイス特集' NEC技報 電子デバイス特集 第62巻/第1号, 200901, 第49-52頁, 日本電気株式会社
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