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Title:
TESTING SYSTEM OF FRAME RELAY NETWORK
Document Type and Number:
Japanese Patent JPH0918480
Kind Code:
A
Abstract:

PURPOSE: To obtain the testing system of a frame relay network which is capable of automatically matching with states, terminating a test without discrepancy and continuing the test without discrepancy when restarts are generated at the various kinds of portions of the frame relay network.

CONSTITUTION: A restart, processor 20 reads the identification data under test saved in a non-volatile memory and recognizes that a test is performed, the information to the effect that the test is performed is imparted to an exchange main body 5 and a restart generation notification is performed. When the restart processor 10 of the main body 5 recognizes the restart generation under test by the restart generation notification, the test release request which is the same as the release of a normal test is notified to a station side line terminating device 3. The restart processor 20 of the device 3 notifies a subscriber side line terminating device 2 of the received test release request on the control channel of a line 4. As a result, the terminating device 2 releases a loop setting and shifts to a normal state. When this device 2 notifies the device 3 of a release completion response and the release completion response of the device 2 is received in the device 3, the release completion response is notified to the main body 5.


Inventors:
OISHI TOSHIAKI
Application Number:
JP1995000163492
Publication Date:
January 17, 1997
Filing Date:
June 29, 1995
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L29/14; H04L12/26; (IPC1-7): H04L12/26; H04L29/14
Attorney, Agent or Firm:
井島 藤治 (外1名)