To provide a thin-film transistor array substrate, used in a liquid crystal display or the like which has superior characteristics and a low defective rate, having no increase in the number of manufacturing processes, and to provide a method of manufacturing the same.

Using gray-tone exposure technology, interconnections which are partially different in thickness are formed, without having to increase the number of processes. In a part where electrical interconnections, such as scanning lines and signal lines intercross, difference in level between the interconnections can be reduced, resulting in improving the step coverage of an insulation film and reducing defects, such as short-circuitings and disconnections between the interconnections. Since a gate insulation film can be formed thinner than in the conventional one, an on-state current of the thin film transistor is increased.