PURPOSE: To facilitate the time setting of a timer while preventing mis-setting of on time and off time by memorizing an off time as addition of a specified number to the on time when an off time setting key is operated.
CONSTITUTION: A key control section 4 is operated to memorize an on time for a timer into a memory section 2. After the setting of the on time, to obtain an off time therefor, a specific time is inputted from the key control section 4 and added to the on time set with an addition circuit 8. The results are memorized into the memory section 2 as such. When no time for the timer is set previously, upon the turning on of a timer switch SW, an LED7 of a warning means 6 flashes. When the on time and the off time are inverted, the warning means 6 causes a flash in the display section for displaying the off time of an indication section 5.
TOKYO SANYO ELECTRIC CO
JPS5066111A | 1975-06-04 | |||
JPS55109985A | 1980-08-23 |