PURPOSE: To reduce the capacity of a buffer in a packet exchange device.

CONSTITUTION: Address filters 140-1-140-4 identify packet address information expanded in parallel by serial/parallel converters 120-1-120-4 and multiplexed on a time division multiplex bus 130. The address filters 140-1-140-4 receive a packet having the address and send it to buffer sections 150-1-150-4, in which the packet is stored. The buffer sections 150-1-150-4 manage number of packets stored in the buffer and the connection/release between a standby memory 170 and the buffer sections 150-1-150-4 is carried out based on the result of comparison between the stored packet number and the buffer capacity.